Webinar on From High-Level Specification to High-Performance Code

7 February 2019, 11 AM - 12 PM ET

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Computer architectures and systems are becoming ever more powerful but increasingly complex. In the era of multicores/manycores/accelerators, only highly trained and educated experts are able to extract the promised performance, especially at a reasonable energy budget, while optimally using the computer systems. To overcome this challenge, the last decade has seen a flurry of activity to automate the design and generation of highly efficient implementations for these multicore/manycore architectures, and to translate high level descriptions of programs into high performance and power efficiency.

About the Presenters

Franz Franchetti received the Dipl.-Ing. (M.Sc.) degree in technical mathematics and the Dr. techn. (Ph.D.) degree in computational mathematics from the Vienna University of Technology, Vienna, Austria, in 2000 and 2003, respectively. Currently, he is a Professor at the Department of Electrical and Computer Engineering, Carnegie Mellon University, Pittsburgh, PA, USA. His research focuses on automatic performance tuning and program generation for emerging parallel platforms and algorithm/hardware cosynthesis. He targets multicore CPUs, clusters and high-performance systems (HPC), graphics processors (GPUs), field-programmable gate arrays (FPGAs), FPGA acceleration for CPUs, and logic-in-memory and 3DIC chip design. Within the Spiral effort, his research goal is to enable automatic generation of highly optimized software libraries for important kernel functionality. In other collaborative research threads, he is investigating the applicability of domain-specific transformations within standard compilers and the application of HPC in material sciences. He led three DARPA projects in the BRASS, HACMS, and PERFECT programs and is a Principal Investigator/Principal Co-Investigator (PI/Co-PI) on a number of federal and industry grants. Dr. Franchetti was a member of the team winning the Gordon Bell Prize (Peak Performance Award) in 2006, and he was a member of the team winning the HPC Challenge Class II Award (most productive system) in 2010. In 2013, he was awarded the CIT Dean’s Early Career Fellowship by the College of Engineering of Carnegie Mellon University.

José M. F. Moura received the Electrical Engineering degree from the Instituto Superior Técnico (IST), Lisboa, Portugal and the Electrical Engineering and M.Sc. degrees and the D.Sc. degree in electrical engineering and computer science from the Massachusetts Institute of Technology (MIT), Cambridge, MA, USA. Currently, he is the Philip L. and Marsha Dowd University Professor at Carnegie Mellon University, Pittsburgh, PA, USA, with the Departments of Electrical and Computer Engineering and, by courtesy, of Biomedical Engineering. He has held visiting Professor appointments at MIT and New York University and the Center for Urban Science & Progress (CUSP), and he was on the faculty of IST. His research interests are in statistical signal image, and data processing, and data science, with particular emphasis on distributed decision and inference in networked systems and graph based data. Dr. Moura is a member of the U.S. National Academy of Engineers, a Fellow of the U.S. National Academy of Inventors, a corresponding member of the Portugal Academy of Science, and a Fellow of the American Association for the Advancement of Science (AAAS). He has received several awards including the IEEE Signal Processing Society Award for outstanding technical contributions and leadership in signal processing and the IEEE Signal Processing Society Technical Achievement Award for fundamental contributions to statistical signal processing. He has served in several volunteering capacities the IEEE, being currently the 2018 President Elect of IEEE, to serve as IEEE President in 2019.

David A. Padua is a Donald Biggar Willet Professor in Engineering at the University of Illinois at Urbana-Champaign, Urbana, IL, USA, where he has been a Faculty Member since 1985. His has done research in parallel computing, autotuning, and compilers and has published more than 170 papers in these areas. He has participated in the organization of more than 70 conferences and workshops and served on the editorial board of the ACM Transactions on Programming Languages and Systems (ACM TOPLAS), Journal of Parallel and Distributed Computing (JPDC), the IEEE Transactions on Parallel and Distributed Systems (IEEE TPDS), and the International Journal of Parallel Programming (IJPP), and as Editor-in-Chief of the Encyclopedia of Parallel Computing (Springer-Verlag). Prof. Padua is a Fellow of the Association for Computing Machinery (ACM) and the recipient of the 2015 IEEE Computer Society Harry H. Goode Award. In 2017, he received a doctorate honoris causa from the University of Valladolid, Spain.

P. (Saday) Sadayappan received the B.Tech. degree from the Indian Institute of Technology Madras, Chennai, India, and the M.S. and Ph.D. degrees from Stony Brook University, Stony Brook, NY, USA. He is a Professor of Computer Science and Engineering at The Ohio State University, Columbus, OH, USA. His research interests include compiler optimization for parallel and heterogeneous systems, domain/pattern-specific compiler optimization, and analysis/characterization of data movement complexity of algorithms.